Digital Electronics A gate is disabled when its disable input is at logic 0. The gate is AND NOR OR none of these AND NOR OR none of these ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In a T flip-flop no of input circuit is 2 1 4 3 2 1 4 3 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics How many entries will be in the truth table of a 3 input NAND gate ? 6 9 3 8 6 9 3 8 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In flip flop clock is present but in latch clock is absent always. present always. none. may be present/absent. absent always. present always. none. may be present/absent. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics For the design of a combinational circuit with four inputs using only NAND gates, the number of K-maps required for the simplification process is 1 4 0 2 1 4 0 2 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of the following gates cannot be used as an inverter? NOR AND NAND X-NOR NOR AND NAND X-NOR ANSWER DOWNLOAD EXAMIANS APP
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